Electronics engineering Projects



This project presents an implementation of delayed mean square adaptive filter (DLMS) for the application of EEG. The noised EEG signals are filtered to obtain a clean EEG with the help of reference signal.By using delayed mean square adaptive filter (DLMS) the critical path and its architecture for fast and low-complexity implementation is also analyzed.The proposed structure of transpose form of DLMS adaptive filter provide much faster convergence and lower register complexity when compared to existing structure of direct form LMS adaptive filter.Based on the experimental results of proposed structure it is clear that one adaption delay method is best one for low area complexity.one of the structure of DLMS adaptive filter,one adaption delay method is used in application of EEG to obtain clean EEG signal. One adaption delay is 44% less in area and 29% less in delay when compared to zero adaption delay and it is 66% less in area and 22% less in delay when compared to two adaption delay.The proposed transpose form of DLMS adaptive filter are implemented for filtering the EEG signal by using Verilog HDL. These designs are simulated by using Modelsim 6.4c and Synthesized by Xilinx 9.1 to implement it in Spartan 3E FPGA Kit.


The least mean squares (LMS) algorithm adjust the filter coefficients to minimize the cost function.The LMS algorithms do not involve any matrix operations. Therefore, the LMS algorithms require fewer computational resources and memory. The eigen value spread of the input correlation matrix, or the correlation matrix of the input signal, might affect the convergence speed  of the resulting adaptive filter.

There are six different types of LMS algorithm they are Standard LMS, Normalized LMS, Leaky LMS, Normalized Leaky LMS, Sign LMS, Fast Block LMS. Among six fast block LMS is best one because the fast block LMS algorithm uses the fast Fourier transform (FFT) to transform the input signal x(n) to the frequency domain. This algorithm also updates the filter coefficients in the frequency domain. Updating the filter coefficients in the frequency domain can save computational resources.

Electronics engineering Projects
Fig Block diagram of fast block LMS

These are the following steps to calculate the output and error signals by using fast block LMS algorithm.

  1. Concatenates the current input signal block to the previous blocks.
  2. Performs an FFT to transform the input signal blocks from the time domain to the frequency domain.
  3. Multiplies the input signal blocks by the filter coefficients vector .
  4. Performs an inverse FFT (IFFT) on the multiplication result.
  5. Retrieves the last block from the result as the output signal vector .
  6. Calculates the error signal vector by comparing the input signal vector  with .


A few popular applications for FIR filters are listed below:

  • Echo cancellation
  • Telecommunications
  • Data communications
  • Wireless communications
  • Video processing
  • Speech synthesis
  • Filtering
  • High-speed modems


Based on a precise critical-path analysis, we have derived low-complexity architectures for the LMS adaptive filter. We have shown that the direct-form and transpose-form LMS adaptive filters have nearly the same critical-path delay. The direct-from LMS adaptive filter, however, involves less register complexity and provides much faster convergence than its transpose-form counterpart since the latter inherently performs delayed weight adaptation. We have proposed three different structures of direct-form LMS adaptive filter with i) zero adaptation delay ii) one adaptation delay and iii) two adaptation delays. Proposed Design 1 does not involve any adaptation delay. It has the minimum of MUF among all the structures, but that is adequate to support the highest data rate in current communication systems. Among all the three Design 2 is considered to be better. Finally the LMS Adaptive FIR Filter is implemented using Verilog language and dumped into FPGA Spartan Series Device.


We can modify the proposed system by further reducing the area and delay of the design in future by implementing it in digital receiver. We can also use this for other filtering applications.



Electronics Projects
Snapshot :Zero adaptation delay FIR filter






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